cystech electronics corp. spec. no. : c565n3 issued date : 2012.07.27 revised date : page no. : 1/ 8 MTP4151N3 cystek product specification -20v p-channel enhancement mode mosfet MTP4151N3 bv dss -20v i d -830ma r dson @v gs =-4.5v, i d =-350ma 0.3 (typ) r dson @v gs =-2.5v, i d =-300ma 0.46(typ) r dson @v gs =-1.8v, i d =-150ma 0.67(typ) features ? very low level gate drive requirements allo wing direct operation in 3v circuits. ? compact industrial standard sot-23 surface mount package. ? pb-free package. equivalent circuit outline absolute maximum ratings (tj=25 c, unless otherwise noted) parameter symbol limits unit drain-source voltage v ds -20 gate-source voltage v gs 8 v continuous drain current @ t a =25 c, v gs =-4.5v -0.83 continuous drain current @ t a =70 c, v gs =-4.5v i d -0.66 pulsed drain current (note 1) i dm -4 a maximum power dissipation @ t a =25 p d 350 mw thermal resistance, junction-to-ambient r th,ja 357 c/w operating junction and storage temperature tj, tstg -55~+150 c note : 1. pulse width 10 s, duty cycle 2%. MTP4151N3 sot-23 d g gate s g s source d drain
cystech electronics corp. spec. no. : c565n3 issued date : 2012.07.27 revised date : page no. : 2/ 8 MTP4151N3 cystek product specification electrical characteristics (tj=25 c, unless otherwise specified) symbol min. typ. max. unit test conditions static bv dss -20 - - v v gs =0v, i d =-250 a v gs(th) -0.5 -0.9 -1.2 v v ds =v gs , i d =-250 a g fs - 0.85 - s v ds =-10v, i d =-200ma i gss - - 10 v gs = 8v, v ds =0 - - -1 v ds =-20v, v gs =0 i dss - - -10 a v ds =-20v, v gs =0, tj=55 c - 0.3 0.5 v gs =-4.5v, i d =-350ma - 0.46 0.6 v gs =-2.5v, i d =-300ma *r ds(on) - 0.67 0.9 v gs =-1.8v, i d =-150ma dynamic ciss - 121 - coss - 36 - crss - 28 - pf v ds =-10v, v gs =0, f=1mhz *t d(on) - 8 - *t r - 14 - *t d(off) - 30 - *t f - 35 - ns v ds =-10v, i d =-500ma, v gs =-4.5v, r g =10 *qg - 2.1 - *qgs - 0.23 - *qgd - 0.82 - nc v ds =-10v, i d =-830ma, v gs =-4.5v source-drain diode *i s - - -0.83 *i sm - - -4 a *v sd - -0.82 -1.2 v v gs =0v, i s =-350ma *pulse test : pulse width 300 s, duty cycle 2% ordering information device package shipping marking MTP4151N3 sot-23 (pb-free) 3000 pcs / tape & reel 4151
cystech electronics corp. spec. no. : c565n3 issued date : 2012.07.27 revised date : page no. : 3/ 8 MTP4151N3 cystek product specification typical characteristics typical output characteristics 0 0.5 1 1.5 2 2.5 3 3.5 4 012345 -v ds , drain-source voltage(v) -i d , drain current (a) -v gs =1.5v -v gs =1v -v gs =2.5v -v gs =2v -v gs =4.5v -v gs =4v brekdown voltage vs ambient temperature 0.6 0.8 1 1.2 1.4 -75 -50 -25 0 25 50 75 100 125 150 175 tj, junction temperature(c) -bv dss , normalized drain-source breakdown voltage i d =-250 a, v gs =0v static drain-source on-state resistance vs drain current 100 200 300 400 500 600 700 800 900 1000 1100 1200 0.01 0.1 1 -i d , drain current(a) r ds(on) , static drain-source on-state resistance() -v gs =2.5v -v gs =1.5v -v gs =1.8v -v gs =4.5v reverse drain current vs source-drain voltage 0.2 0.4 0.6 0.8 1 1.2 0 0.3 0.6 0.9 1.2 1.5 -i dr , reverse drain current (a) -v sd , source-drain voltage(v) tj=25c tj=150c v gs =0v static drain-source on-state resistance vs gate-source voltage 100 200 300 400 500 600 700 800 900 02468 -v gs , gate-source voltage(v) r ds( on) , static drain-source on- state resistance(m) i d =-350ma drain-source on-state resistance vs junction tempearture 0.4 0.6 0.8 1 1.2 1.4 1.6 1.8 2 -60 -20 20 60 100 140 180 tj, junction temperature(c) r ds( on) , normalized static drain- source on-state resistance v gs =-4.5v, i d =-350ma r ds( on) @ tj=25c : 297m
cystech electronics corp. spec. no. : c565n3 issued date : 2012.07.27 revised date : page no. : 4/ 8 MTP4151N3 cystek product specification typical characteristics(cont.) capacitance vs drain-to-source voltage 10 100 1000 0.1 1 10 100 -v ds , drain-source voltage(v) capacitance---(pf) c oss ciss crss threshold voltage vs junction tempearture 0.4 0.6 0.8 1 1.2 1.4 -60 -40 -20 0 20 40 60 80 100 120 140 160 tj, junction temperature(c) -v gs( th) , normalized threshold voltage i d =-250 a single pulse power rating, junction to ambient 0 4 8 12 16 20 0.001 0.01 0.1 1 10 100 pulse width(s) power (w) t j( max) =150c t a =25c r ja =357c/w gate charge characteristics 0 1 2 3 4 5 0 0.2 0.4 0.6 0.8 1 1.2 1.4 1.6 1.8 2 2.2 2.4 qg, total gate charge(nc) -v gs , gate-source voltage(v) i d =-830ma v ds =-10v maximum safe operating area 0.001 0.01 0.1 1 10 0.01 0.1 1 10 100 -v ds , drain-source voltage(v) -i d , drain current (a) dc 10ms 100m 1ms 100 s t a =25c, tj=150c, v gs =-4.5v, r ja =357c/w single pulse maximum drain current vs junctiontemperature 0 0.2 0.4 0.6 0.8 1 25 50 75 100 125 150 175 tj, junction temperature(c) -i d , maximum drain current(a) t a =25c, v gs =-4.5v, r ja =357c/w
cystech electronics corp. spec. no. : c565n3 issued date : 2012.07.27 revised date : page no. : 5/ 8 MTP4151N3 cystek product specification typical characteristics(cont.) typical transfer characteristics 0 1 2 3 4 5 6 012345 -v gs , gate-source voltage(v) -i d , drain current (ma) -v ds =5v power derating curve 0 0.05 0.1 0.15 0.2 0.25 0.3 0.35 0.4 0 20 40 60 80 100 120 140 160 t a , ambient temperature() p d , power dissipation(w) transient thermal response curves 0.001 0.01 0.1 1 1.e-04 1.e-03 1.e-02 1.e-01 1.e+00 1.e+01 1.e+02 1.e+03 t 1 , square wave pulse duration(s) normalized transient thermal resistance single pulse 0.01 0.02 0.05 0.1 0.2 d=0.5 1.r ja (t)=r(t)*r ja 2.duty factor, d=t 1 /t 2 3.t jm -t a =p dm *z ja (t) 4.r ja =357 c/w
cystech electronics corp. spec. no. : c565n3 issued date : 2012.07.27 revised date : page no. : 6/ 8 MTP4151N3 cystek product specification reel dimension carrier tape dimension
cystech electronics corp. spec. no. : c565n3 issued date : 2012.07.27 revised date : page no. : 7/ 8 MTP4151N3 cystek product specification recommended wave soldering condition product peak temperature soldering time pb-free devices 260 +0/-5 c 5 +1/-1 seconds recommended temperature profile for ir reflow profile feature sn-pb eutectic assembly pb-free assembly average ramp-up rate (tsmax to tp) 3 c/second max. 3 c/second max. preheat ? temperature min(t s min) ? temperature max(t s max) ? time(ts min to ts max ) 100 c 150 c 60-120 seconds 150 c 200 c 60-180 seconds time maintained above: ? temperature (t l ) ? time (t l ) 183 c 60-150 seconds 217 c 60-150 seconds peak temperature(t p ) 240 +0/-5 c 260 +0/-5 c time within 5 c of actual peak temperature(tp) 10-30 seconds 20-40 seconds ramp down rate 6 c/second max. 6 c/second max. time 25 c to peak temperature 6 minutes max. 8 minutes max. note : all temperatures refer to topside of t he package, measured on the package body surface.
cystech electronics corp. spec. no. : c565n3 issued date : 2012.07.27 revised date : page no. : 8/ 8 MTP4151N3 cystek product specification sot-23 dimension *: typical inches h j k d a l g v c b 3 2 1 s style: pin 1.gate 2.source 3.drain marking: te 3-lead sot-23 plastic surface mounted package cystek package code: n3 4151 millimeters inches millimeters dim min. max. min. max. dim min. max. min. max. a 0.1102 0.1204 2.80 3.04 j 0.0032 0.0079 0.08 0.20 b 0.0472 0.0669 1.20 1.70 k 0.0118 0.0266 0.30 0.67 c 0.0335 0.0512 0.89 1.30 l 0.0335 0.0453 0.85 1.15 d 0.0118 0.0197 0.30 0.50 s 0.0830 0.1161 2.10 2.95 g 0.0669 0.0910 1.70 2.30 v 0.0098 0.0256 0.25 0.65 h 0.0000 0.0040 0.00 0.10 notes: 1.controlling dimension: millimeters. 2.maximum lead thickness includes lead finish thickness, and minimum lead thickness is the minimum thickness of base material. 3.if there is any question with packing specification or packing method, please c ontact your local cystek sales office. material: ? lead: pure tin plated. ? mold compound: epoxy resin family, flammability solid burning class: ul94v-0. important notice: ? all rights are reserved. reproduction in whole or in part is prohibited without the prior written approval of cystek. ? cystek reserves the right to make changes to its products without notice. ? cystek semiconductor products are not warranted to be suitable for use in life-support applications, or systems. ? cystek assumes no liability for any consequence of customer pr oduct design, infringement of pat ents, or application assistance .
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